1. Field of the Invention
The present invention relates to transistors of a semiconductor memory device and methods of forming the same, and more particularly, to double gate transistors having at least two polysilicon patterns on a thin body used as an active region and methods of forming the same.
2. Description of the Related Art
In recent years, semiconductor memory devices have been fabricated using transistors having vertical channels instead of transistors having horizontal channels to increase the integration density of the transistors. The transistors having vertical channels are driven using a three-dimensional field effect resulting from the sidewall and the top surface of an active region being protruded from a semiconductor substrate. The active region protruded from the semiconductor substrate may be referred to as the active region of a thin body in the transistor having a vertical channel. In contrast, the transistor having horizontal channel may be driven using a two-dimensional field effect resulting only from the top surface of the active region of the semiconductor substrate. The transistor having horizontal channel does not use a sidewall of the active region due to its structure. Accordingly, the transistor having a vertical channel can have an increased channel length by using the sidewall of the active region as compared to the transistor having a horizontal channel. A resulting process margin in the transistor having a vertical channel is increased as compared to the transistor having a horizontal channel because width of the top surface of the active region in the transistor having a vertical channel can be smaller than the transistor having a horizontal channel. Accordingly, the transistor having a vertical channel can have a smaller interval between adjacent active regions, and may thus be able to increase the integration density of the semiconductor memory devices as compared to the transistor having a horizontal channel.
However, when the integration density of the semiconductor memory device increases, the transistor having the vertical channel cannot keep the same threshold voltage as the transistor having the horizontal channel while having the same channel length and the channel width. This is because the transistor having the vertical channel must have a top surface width of the active region that is smaller in one direction in order to increase the integration density of the semiconductor memory device. This decrease in width of the top surface of the active region, in turn, decreases the thickness of the thin body which defines the active region of the transistor having the vertical channel in a three-dimensional manner. When the thickness of the thin body decreases, the transistor having the vertical channel brings junction depletions formed from the sidewall of the active region facing each other during its drive, which thus causes a short channel effect. Thus, transistors having vertical channels cannot easily have a desired threshold voltage due to the short channel effect.
In the meantime, U.S. Patent Publication No. 2005/0029583 to Martin Popp et. al. discloses a field effect transistor and a method for production thereof.
According to U.S. Patent Publication No. 2005/0029583, the transistor and the fabrication method include web-type active semiconductor regions, which are vertically connected in a semiconductor substrate. The active semiconductor regions have side surfaces and top surfaces. First and second gate oxide layers are formed on the side and top surfaces of the active semiconductor regions, respectively. First and second gate electrodes are formed on the first and second gate oxide layers, respectively. In this case, the first gate electrode is formed on the first gate oxide layer, and the second gate electrode is formed on the second gate oxide layer to cover the first gate electrode.
However, the first and second gate electrodes cannot completely fix the required decrease in the threshold voltage of the transistor due to the decrease in the widths of the active semiconductor regions. This is because the transistor brings junction depletions formed from side surfaces of the active region facing each other during its drive to cause the short channel effect. In order to prevent the short channel effect, impurity ions may be implanted in the active semiconductor regions. In this case, charge mobility in the transistor may be degraded due to the impurity ions during its drive.